MC74HCT138AN |
RFQ for MC74HCT138AN Required Field |
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| Technical/Catalog Information | MC74HCT138ANG |
| Vendor | ON Semiconductor |
| Category | Integrated Circuits (ICs) |
| Circuit | 1 x 3:8 |
| Independent Circuits | 1 |
| Mounting Type | Through Hole |
| Current - Output High, Low | 4mA, 4mA |
| Package / Case | 16-DIP (300 mil) |
| Packaging | Tube |
| Type | Decoder/Demultiplexer |
| Voltage Supply Source | Single Supply |
| Operating Temperature | -55°C ~ 125°C |
| Voltage - Supply | 4.5 V ~ 5.5 V |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | MC74HCT138ANG MC74HCT138ANG MC74HCT138ANGOS ND MC74HCT138ANGOSND MC74HCT138ANGOS |
| Product | Manufacturers | Pack | D/C |
| MC74HCT138AN | - | DIP-16 | 99+ |
The MC74HCT138A is identical in pinout to the LS138. The HCT138A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.
The HCT138A decodes a threebit Address to oneofeight activelot outputs. This device features three Chip Select inputs, two activelow and one activehigh to facilitate the demultiplexing, cascading, and chipselecting functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states.
Features |
| • Output Drive Capability: 10 LSTTL Loads• TTL/NMOS Compatible Input Levels• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 4.5 to 5.5 V• Low Input Current: 1.0 mA• In Compliance with the Requirements Defined by JEDEC Standard No. 7A• Chip Complexity: 122 FETs or 30.5 Equivalent Ga |
| Symbol | Parameter | Value | Unit |
| vcc | DC Supply Voltage (Referenced to GND) | 0.5 to +7.0 | V |
| VIN | DC Input Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
| VOUT | DC Output Voltage (Referenced to GND) | 0.5 to VCC + 0.5 | V |
| LIN | DC Input Current, per Pin | ±20 | mA |
| IOUT | DC Onput Current, per Pin | ±35 | mA |
| ICC | DC Supply Current Per Supply Pin | ±75 | mA |
| PD | Power dissipation in still air piastic DIP SOIC package |
750 500 |
mW |
| TSTG | Storage Temperature | 65 to +150 | °C |
| TL | Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) |
260 | °C |
